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3-9 SanDisk miniSD Card Product Manual, Rev. 1.1 © 2003 SANDISK CORPORATION
Table 3-4. Signal Line’s Load
Parameter Symbol Min. Max. Unit Remark
Pull-up resistance R
CMD
R
DAT
10 100
k
To prevent bus floating
Bus signal line capacitance C
L
250 pF f
PP
5 MHz, 21 cards
Bus signal line capacitance C
L
100 pF f
PP
20 MHz, 7 cards
Single card capacitance C
CARD
10 pF
Maximum signal line inductance 16 nH f
PP
20 MHz
Pull-up resistance inside card (pin 1) R
DAT3
10 90
k
May be used for card detection
3.4.4. Bus Signal Levels
As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage (see
Figure 3-7).
Figure 3-7. Bus Signal Levels
To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within
the specified ranges in Table 3-5 for any VDD of the allowed voltage range.
Table 3-5. Input and Output Voltages
Parameter Symbol Min. Max. Unit Conditions
Output HIGH voltage VOH
0.75VDD
V
IOH=-100 µA
@V
DD
(min.)
Output LOW voltage VOL
0.125VDD
V
IOL=100 µA
@V
DD
(min.)
Input HIGH voltage VIH
0.625VDD
VDD + 0.3 V
Input LOW voltage VIL VSS-0.3
0.25VDD
V
Input
Low
Level
Input
High
Level
Output
High
Level
Output
Low
Level
Undefined
V
DD
V
OH
V
IH
V
L
V
OL
V
SS
t
V
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