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SanDisk Industrial Grade CompactFlash 5000 Product Manual
© 2007 SanDisk® Corporation 31 July 2007
Table 25: Attribute Memory Function
Function Mode
-
REG
-CE2 -CE1 A9 A0 -OE -WE D15-D8 D7-D0
Standby X H H X X X X High Z High
Z
Read Byte Access
CIS ROM (8 bits)
L H L L L L H High Z Even
Byte
Write Byte Access
CIS (8 bits) (Invalid)
L H L L L H L
Irrelevant
Even
Byte
Read Byte Access
Configuration (8 bits)
L H L H L L H High Z Even
Byte
Write Byte Access
Configuration (8 bits)
L H L H L H L
Irrelevant
Even
Byte
Read Word Access
CIS (16 bits)
L L L L X L H Not Valid Even
Byte
Write Word Access
CIS (16 bits) (Invalid)
L L L L X H L
Irrelevant
Even
Byte
Read Word Access
Configuration (16
bits)
L L L H X L H Not Valid
Even
Byte
Write Word Access
Configuration (16
bits)
L L L H X H L
Irrelevant
Even
Byte
3.4.2
Configuration Option Register (Address 200h in
Attribute Memory)
The Configuration Option Register is used to configure the card’s interface,
address decoding and interrupt and to issue a soft reset to the CompactFlash
Memory Card.
Operation D7 D6 D5 D4 D3 D2 D1 D0
R/W SRESET LevIREQ Conf5 Conf4 Conf3 Conf2 Conf1 Conf0
Bit Name Description
D7 SRESET Setting this bit to one (1), waiting the minimum reset width time
and returning to zero (0) places the card in the Reset state.
Setting this bit to “1” is equivalent to assertion of the +RESET
signal except that the SRESET bit is not cleared. Returning this
bit to “0” leaves the card in the same unconfigured Reset state
as following power-up and hardware reset. Using the PCMCIA
Soft Reset is considered a hard reset by the ATA Commands, in
contrast with Soft Reset in the Device Control Register.
D6 LevIREQ This bit is set to “1” when Level Mode Interrupt is selected, and
“0” when Pulse Mode is selected. Set to “0” by reset.
D5-D0 Conf5-Conf0 Configuration Index. Set to “0” by reset. This is used to select
the card’s mode of operation as shown below. Note: Conf5 and
Conf4 are reserved and must be written as “0”.
- SanDisk Industrial Grade 1
- CompactFlash 5000 1
- Table of Contents 2
- List of Tables 5
- Introduction 8
- Features 9
- CompactFlash Standard 10
- PCMCIA Standard 10
- Related Documentation 10
- Functional Description 10
- Technology Independence 11
- Defect and Error Management 11
- Bad Block Management 12
- Automatic Sleep Mode 12
- Power Supply Requirements 12
- Wear Leveling 12
- Product Specifications 14
- System Power Requirements 15
- System Performance 15
- System Reliability 16
- Physical Specifications 16
- Regulatory Compliance 17
- Traceability 17
- Interface Description 18
- Electrical Description 20
- Table 10: Signal Description 21
- Electrical Specification 24
- Output Drive Characteristics 25
- Power Up/Down Timing 26
- Common Memory Read Timing 27
- Table 16 (continued) 28
- Memory Timing Diagrams 29
- I/O Read Timing Diagram 30
- True IDE Mode 32
- Card Configuration 35
- Attribute Memory Function 36
- Attribute Memory function 37
- Attribute Memory) 38
- 202h in Attribute Memory) 39
- Memory) 40
- I/O Transfer Function 41
- Configurations 43
- Memory Mapped Addressing 45
- True IDE Mode Addressing 46
- ATA Registers 46
- Read Only) 47
- Device Control Register 50
- Offset Fh) 50
- ATA Command Description 52
- Check Power Mode–98H, E5H 53
- Erase Sector(s)–C0H 54
- Format Track–50H 55
- Identify Device–ECH 55
- Idle–97H, E3H 63
- Idle Immediate–95H, E1H 63
- Read Buffer–E4H 64
- Read DMA Command–C8H, C9H 64
- Read Multiple–C4H 65
- Read Long Sector–22H, 23H 66
- Read Sector(s)–20H, 21H 66
- Recalibrate–1XH 67
- Request Sense–03H 67
- Seek–7XH 68
- Set Features–EFH 69
- Set Multiple Mode–C6H 70
- Set Sleep Mode–99H, E6H 70
- Standby–96H, E2H 71
- Standby Immediate–94H, E0H 71
- Translate Sector–87H 72
- Wear Level–F5H 72
- Write Buffer–E8H 73
- Write DMA Command–CAH, CBH 73
- Write Long Sector–32H, 33H 73
- Write Multiple Command–C5H 74
- Write Sector(s)–30H, 31H 75
- Write Verify Sector(s)–3CH 76
- Error Posting 77
- CIS Description 78
- I. Warranty Statement 95
- II. General Provisions 95
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