SanDisk CompactFlash 5000 Manual descarregar pdf (Página 47)

SanDisk Industrial Grade CompactFlash 5000 Product Manual

Note: Because of the overlapped registers, access to the 1F1, 171 or offset 1

is not defined for word (-CE2 = 0 and -CE1 = 0) operations. SanDisk

products treat these accesses as accesses to the Word Data Register.

The duplicated registers at offsets 8, 9 and Dh have no restrictions on

the operations that can be performed by the socket.

Table 35: Data Register

Data Register CE2 CE1 A0 Offset Data Bus

Word Data Register 0 0 X 0,8,9 D15-D0

Even Data Register 1 0 0 0,8 D7-D0

Odd Data Register 1 0 1 9 D7-D0

Odd Data Register 0 1 X 8,9 D15-D0

Error/Feature Register 1 0 1 1,Dh D7-D0

Error/Feature Register 0 1 X 1 D15-D0

Error/Feature Register 0 0 X Dh D15-D0

4.5.2

Error Register (Address–1F1[171]; Offset 1, 0Dh

Read Only)

This register contains additional information about the source of an error when

an error is indicated in bit 0 of the Status Register. The bits are defined as

follows:

D7 D6 D5 D4 D3 D2 D1 D0

BBK UNC 0 IDNF 0 ABRT 0 AMNF

This register is also accessed on data bits D15-D8 during a write operation to

offset 0 with CE2 low and -CE1 high.

Bit Name Description

D7 BBK Set when a bad block is detected.

D6 UNC Set when an uncorrectable error is encountered.

D5 0 Bit set to 0.

D4 IDNF The requested sector ID is in error or cannot be found.

D3 0 Bit set to 0.

D2 ABRT Set if the command has been aborted because of a card status

condition: (Not Ready, Write Fault, etc.) or when an invalid

command has been issued.

D1 0 Bit set to 0.

D0 AMNF Set in case of a general error.

1 2 ... 42 43 44 45 46 47 48 49 50 51 52 ... 96 97

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SanDisk CompactFlash 5000 Manual Página 47